1. Field of the Invention
The present invention relates generally to a system and method for designing digital circuits and, more particularly, to a system and method for designing re-programmable digital circuits.
2. Description of the Prior Art
Until recently, it has been difficult to substitute programmable devices for non-programmable design approaches for a number of reasons. These reasons include the following:                1. Programmable devices are more expensive on a per-unit basis than the dedicated circuitry they replace.        2. Programmable devices operate more slowly than discrete circuitry.        3. Programmable devices are inherently less power-efficient than discrete circuitry.        4. System implementation on programmable hardware is inherently more difficult than on non-programmable platforms.        
At present, these factors have generally relegated programmable logic to three common applications:                1. Using the programmable device as a development and prototyping platform during the design phase of a project.        2. Using the programmable device for specialized, low-volume or high-value applications in which programmability and re-programmability benefits outweigh the cost or efficiency penalties imposed by their use.        3. Using low-capacity and/or low-cost “commodity” programmable devices to replace a limited amount of the digital circuit, allowing custom, or so-called “glue logic,” to support conventional non-programmable discrete circuitry for a specific application.        
Typically, once the market size for a particular product reaches a certain level, developers have the option to move custom circuitry onto an Application Specific Integrated Circuit (ASIC). Implementing the bulk of a complex digital system onto a dedicated ASIC provides very high performance and efficiency at very low per-unit cost. However, as ASIC manufacturing has moved to ever smaller geometries, following the principle of Moore's Law, the design and tooling costs have risen to the level at which many applications cannot currently support this move to dedicated silicon.
The same technology that has made ASIC design more difficult and expensive has benefited Field Programmable Gate Array (FPGA) design. Moving FPGAs to these smaller geometries (currently 90 nm) enables them to be smaller, faster, more efficient, and less expensive. The leaders in FPGA technology, Xilinx and Altera, are now competing aggressively in an emerging “commodity FPGA” marketplace, offering high-capacity FPGAs at prices that are a full order of magnitude lower than the previous generation.
As a result, it is now possible to design complex digital systems that are hosted almost entirely inside a re-programmable device at a deliverable price. The potential benefits of designing on a re-programmable platform include:                1. Shorter time-to-design with no delay while prototyping or tooling for mass production;        2. Lower development cost with no tooling or prototyping costs;        3. Lower development risk without need to scrap defective tooling and providing the ability to re-design on the fly; and        4. In-field upgradability after a product is delivered.        
However, before these benefits can be realized, the problem of implementing complex hardware and software systems on a re-programmable platform must be addressed. While many engineers look to FPGA technology to provide higher levels of on-chip integration and a lower risk alternative to the cost and lead time of conventional ASICs, system-level design on an FPGA platform is a difficult exercise, particularly when it comes to bringing the processor into the FPGA.
Presently, the design of such ambitious “system scale” designs has required the same level of design expertise as the design of ASICs. The skill, knowledge, and technology resources required for this level of design are largely restricted to large enterprises. For example, these designs are normally rendered in a highly cumbersome textual hardware description language (HDL). This language is an efficient vehicle for component, or micro-level, logic, but becomes unwieldy when applied at the systems level. Another problem is system verification, in which elaborate test strategies must be employed in order to simulate the operation of a complex system prior to its implementation.
Thus, it would be desirable to provide a design system and method for re-programmable digital platforms which overcome the above limitations and disadvantages of conventional systems and techniques and facilitate the design of re-programmable digital platforms. It would also be desirable to provide re-programmable system design that is attainable for the broadest potential market, and to overcome a number of problems in re-programmable design implementation. It is to this end that the present invention is directed. Overcoming these obstacles has resulted in several novel solutions that have no precedent in the electronics design automation domain. The various embodiments of the present invention provide many advantages over conventional design systems and methods.